SOC Design Services
Shirak Technologies develop and transform the ideas and virtual concepts into ASIC solutions. We work with cutting-edge technologies and deliver the value-added services by innovation at each and every node and design stage by automation-driven optimization. We develop the system level architecture based on the high level requirements, we develop hardware logic while reducing SOC development risk, we convert the RTL to physical design, we develop system and software applications to work with silicon or utilities. 
The Company delivers SOC design services on 65nm to 14nm technologies with multi-million gate design and GHz operating frequencies.  
DFT Design Services
The Company delivers the comprehensive DFT solutions for Analog, Digital, Memory and Infrastructure IPs. The verification is performed at each design stage to reduce the overall cost while maintaining high defect coverage. The IP integration and hierarchic test approach provide the flexibility for developing large SOCs, by using latest technologies for test, diagnostics and repair.
Semiconductor Manufacturing services
The Company delivers the test pattern generation by using the tools for test houses (via JTAG interface) to perform SOC level test while performing pattern porting. DFT Scan, IP level patter transformation and Yield Analysis are the common approaches for Waver testing. The test engineers deliver WGL pattern, integrate and execute test assembly as well as perform the silicon debug for the chip rump-up and root-cause analysis.